EE Herald

Advanced VLSI design: Use of qubits in logic circuit design

One of the most promising nanotechnologies which can replace the present transistor based CMOS technology is the Qubit (Quantum-Dot) Cellular Automata. The major advantages of this technology are ...
Electronic Design

Layout-Dependent Modeling Boosts CMOS Gate Density

A layout-dependent circuit-design model from Toshiba helps boost gate density and improve cost-performance in next-generation 45-nm CMOS technology. More specifically, 45-nm CMOS gate density can be 2 ...
Nature

Low Power Design in CMOS and FinFET Logic Circuits

Low power design has become a cornerstone of modern integrated circuit development, driven by energy efficiency demands and the challenges of scaling in nanometre technologies. Innovations in ...
Nature

Current-Mode Logic and Low-Power CMOS Technology

Current-Mode Logic (CML) and low-power Complementary Metal-Oxide-Semiconductor (CMOS) technology continue to drive significant advances in digital circuit design, particularly in high-speed and energy ...
EDN

Driving CMOS totem poles with logic signals, AC coupling, and grounded gates

Despite massive, large-scale integration being ubiquitous in contemporary electronic design, discrete MOSFETs in the classic CMOS totem pole topology are still sometimes indispensable. This makes tips ...
Design-Reuse

Efficient logic optimization utilizing complementary behavior of CMOS gates

Any typical digital design style with CMOS uses complementary pairs of p-type and n-type MOSFETs for logic functions implementation. Naturally, CMOS always ought to provide INVERTED outputs like ...
EDN

VLSI symposium eyes 65-nm logic

Austin, Texas – Though 90-nanometer designs are not expected to move into early commercial production until late this year, about a dozen papers at the 2003 VLSI Technology Symposium will target 65-nm ...