Managing the power consumption of ICs is an increasingly difficult challenge, because each new generation of portable device includes expanded features and demands longer battery lives.
Given the growing importance and impact of portable, battery-operated devices in today’s society, it’s easy to understand why power consumption has become such a critical factor in IC design. But it’s ...
Non-mainstream technologies can offer advantages over more commonly used approaches, but usually at some additional cost (otherwise they’d probably be mainstream). The additional cost could be in ...
Computer architecture researchers evaluate key areas such as pipelining, organization, instruction issue, branching, and exception handling when considering asynchronous and synchronous design and ...
A software tool for automatically converting synchronous circuit designs into asynchronous equivalents is being developed by researchers at the University of Edinburgh. Asynchronous ICs – which do not ...
Wire delay is beginning to dominate gate delay in current CMOS technologies. According to Moore’s Law by 2016 CMOS feature size should be on the order of 22 nm with clock frequencies reaching around ...
Micropipelines. Ivan E. Sutherland: The Turing Award Lecture. Communications of the ACM, Vol. 32, No. 6, pages 720¿738; June 1989. Asynchronous Circuits and Systems. Special issue of Proceedings of ...
Seiko Epson developed what it claims is the world's first flexible 8bit asynchronous microprocessor, using low-temperature polysilicon thin-film transistors (LTPS-TFTs) on a plastic substrate. With ...
PARIS — Tiempo AS, French startup specializing in the design of asynchronous ICs, announced it has raised 5 million euros ($6.9 million) in a Series B financing round with venture capital firms ...
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